Optical imaging semiconductors, such as CMOS imaging sensors or Charge Couple Devices (CCDs), are capable of generating images from received light waves. Imaging semiconductor devices are usually encapsulated in a package that has a window made of glass, plastic or some other translucent material, that allows light to impinge onto the light sensitive circuitry of the device.
One known type of packaging for optical semiconductor devices involves the use of a multi-piece ceramic package commonly called a leadless chip carrier (LCC). The package includes a ceramic substrate including a die attach area. An integrated circuit (IC) such as an imaging chip, is attached to the die attach area. A ceramic contact template having electrical contact pads is provided around the periphery of the package and surrounding the chip. Electrical connections, such a wire bonds, are formed between the chip and the pads on the contact template. The height of the contact template is approximately the same as that of the chip on the ceramic substrate. A ceramic spacer is provided on top of the contact template around the periphery of the package. A transparent cover, such as glass, is then mounted and hermetically sealed on top of the ceramic spacer. Recess regions, sometimes referred to as castellations, are formed on the exterior periphery of the package. The purpose of the castellations is to provide electrical traces from the contact pads of the contact template to the underside of the package. Contacts located on the underside of the package, such as solder balls, are used to electrically connect the chip inside the package to other electrical devices such as those on a printed circuit board. In alternative examples of an LCC package for optical chips, the substrate, contact template and the spacer can all be made of a plastic, such as epoxy.
There are a number of problems associated with the aforementioned package. One significant problem is maintaining the proper tolerances for the chip package. With imaging applications, the IC includes imaging circuitry. The imaging circuitry needs to be at a focal point with respect to the lens used to provide images onto the IC. With the multi-piece, multi-level package described above, it is relatively difficult to manufacture and assemble the package with the precise tolerances needed to assure that the IC is within the focal plane of the lens. Another problem with the aforementioned package is that the IC is susceptible to contamination during assembly. The IC is attached to the substrate in an initial manufacturing step. Thereafter, numerous other steps are performed, such a wire bonding, attaching the contact template, and the spacer template, etc. During each of these steps, the IC is exposed to elements and dust particles that can readily contaminate the pixel area on the chip. Since the IC is protected from contamination only after the glass cover is attached to the package, there is a relatively high probability that the chip will be damaged, thereby reducing yields. Furthermore, ceramic packages are relatively expensive. They require assembly as single units and are generally not amenable to mass production semiconductor fabrication techniques. Ceramic LCC packages have reliability problems and are expensive.
Another type of wafer-level packaging for optical semiconductor devices involves the use of two layers of glass. With this package, a first layer of glass is attached to the active surface of a wafer using an optically clear epoxy and a second layer of glass is attached to the bottom surface of the wafer also using an epoxy. Solder bumps are formed on the second layer of glass underneath the wafer. Individual packages are formed by scribing the wafer. Metal traces, sometimes called “T-junctions”, are formed between bond pad contacts formed on the top of each die and exposed during the scribing process and the solder bumps formed on the bottom of the package. The problem with this type of package is that the T-junctions tend to be unreliable. Also, the use of the optically clear epoxy on the active surface of the wafer tends to scatter the light impinging on the light sensitive circuitry of the chip. This may reduce the efficiency of the imaging circuitry.
An apparatus and method of wafer level packaging of optical imaging die using conventional semiconductor packaging techniques is therefore needed.